Silicon technology has advanced such that designers must commonly design chips consisting of millions of transistors. Because of these advances in technology and increasing time to market pressure, designers are developing entire electronic systems or subsystems on a single chip, as opposed to spreading out the design over multiple chips. For example, a subsystem design for a cellular phone may contain a micro-controller as well as a digital signal processor and other components all on a single chip (typically an application-specific integrated circuit or ASIC) or portion of a single chip. These subsystem designs, when stored as design data and supporting documentation for use with electronic design automation (EDA) tools on a computer workstation in a “virtual socket” design environment, are sometimes referred to as “cores” or “virtual components” (“VCs”).
After testing and verifying the design for the components within an overall system, the subsystem designs can often be reused in other application areas—for instance, the microcontroller used in the cellular phone ASIC example above could also potentially be used in a chip used in an automotive application. It could be very costly, wasteful and inefficient if these subsystem designs (i.e., cores) were redesigned for every new application. Design reuse of these cores, also commonly referred to as “IP” or “IPs” (short for “Intellectual Property” or “Intellectual Properties,” respectively), would allow designers to become more efficient and foster a market for existing design cores which is applicable to more than one application.
While the novelty of treating IPs as marketable commodities is such that associated terminology is still evolving, some standardization has been achieved. For example, the Virtual Socket Interface Alliance (VSIA) is an organization formed to specify open standards for VCs, permitting the reuse of cores from multiple sources on a single integrated circuit (IC) or chip. In an analogy to how discrete ICs fit into sockets on a printed circuit board, the VCs may be viewed, as “integrated” into “virtual sockets” in an IC design; hence, the title of the VSIA organization. Using the open standards of the VSIA, it is hoped by the participants that IP from different sources can be quickly integrated at the functional, logical and physical levels. The virtual components, or VCs, can take on many forms—i.e., they can be either system level macros, megacell, or embedded software cores used in system chip design. VCs can generally be categorized according to the different abstract levels of design used to captured them (which also dictates to some extent the manner in which they are stored). For example, a hardware VC such as megacell could be either captured in the form of a functional description in a standard functional language such as HDL (Hardware Description Language), a physical abstraction in a standard physical abstraction language such as GDSII, or layout data. Similarly, an embedded software VC can be stored in the form of either source code or executable code. This flexibility helps the user reuse VCs in the abstraction level he or she may want.
Because of the advantages gained by users in reusing virtual components so as to meet the demands of increasing design complexity and time to reaching the market, IP databases or repositories have been developed to accumulate core designs for reuse. However a mere repository provides no assurances that the core designs stored meet applicable standards, nor does such a repository necessarily provide ease of and control over access and use.
Thus, there is a need for a distributed database providing an infrastructure for electronic design that users can access remotely and conveniently, and which provides assurances of quality and a measure of security.